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Wipro developed an OC-12 rate ATM protocol processor
board as well as ATM protocol processor software.
The entire system was a portable network test
equipment, a fact that placed major restrictions
on dimensions of the board. The Wipro designed
ATM processor board interfaced to an SDH/SONET
board, sending and receiving ATM traffic from
it, as well as performing ATM traffic analysis.
Key aspects of the design
included
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Various ATM standards implementation
in FPGA logic such as I432 for HEC, PRBS/User
defined traffic generation and detection,
PLCP framing, AAL1/5, Cell Delay Variation,
ATM header and payload error generation/detection,
O.191, Utopia interface, PCI interface .etc. |
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MPC860 micro processor,
Segmentation And Re-assembly Processor |
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Application software running
on VxWorks managing the ATM protocol processor
board having ATM traffic with AAL0/1/5 protocols
for profiles such as CBR/VBR/UBR/ABR |
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GUI application for user
interaction having interface to the board
via Ethernet |
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