Wipros engineering
team designed and implemented the complete hardware
and software for the line card, incorporating the
following features:
 |
Support for 6 DS3 interfaces
or 2 OC3 interfaces |
 |
Complete data path implemented
in a high speed packet forwarding FPGA |
 |
High system reliability
because of extensive system monitoring functions
that effectively managed all system resources
and provided system robustness |
 |
Support for telecomm functionality,
flash file management for various file operations
and remote monitoring |
 |
FPGA implementation for
scrambling/de-scrambling to support clear
channel DS3s |
The high-speed packet forwarding logic was implemented
in a Xilinx Virtex 1000E FPGA device. The FPGA
handled the data and control paths of the line
card. It also reported queue depth feedback that
was sent to the central card to help implement
the QoS functionality. The software for the card
was developed on a VxWorks RTOS(Real Time Operating
System) platform. The telecomm functionality was
developed using rhapsody, the object-oriented
tool.
The software included:
 |
Device drivers for the
framer and HDLC controller chips |
 |
Customization of VxWorks
for the target MIPS processor |
 |
Boot and image download
code for board bootup |
 |
Application software subsystem
on the card. |
|