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Case Study

Celox: Introducing a carrier-class IP switching product, well ahead of competition

The customer

Founded in 1999, Celox Networks built the first carrier class, carrier scale IP services delivery platform to enable (NSPs) to drive new service revenues from network-based IP-centric services.

The challenge

With an increase in “always-on” traffic across networks, issues like Network scalability, value-added IP services and open access have become technology hurdles as well as business opportunities for cable operators. Celox aimed to address these issues with its products.

With concerns on the product design cycle time and speedy time-to-market, Celox wanted an outsourcing partner with very high ratings on technology expertise and attention to its clients’ key time-to-market criteria.

The solution

The design cycle extended right from design through implementation and simulation, test logic insertion, timing closure and support, all the way through to tape-out. Since this was the customer’s very first silicon product, Wipro played a major role in defining the ASIC design methodology as well, thus truly complementing the customer’s networking and product know-how with Wipro’s own ASIC design and methodology skills.

While the client company focused on the IP and the overall integration, the Wipro team’s contribution in this year-long project involved the design and development of ASICs and PC Boards that were eventually deployed in the customer’s edge routing, IP services creation and switching product.

The benefits

The chipset was a first silicon success. Wipro's software team developed the firmware, network management and protocol software development for the switch. Wipro also provided significant support during the ASIC and board bring-up activities.

Best practices adopted included equivalence checking, which was employed at every stage of the netlist modification to avoid wasting time on gate level simulations

Extensive use of tools like Avant ExploreRTL for code purification, and Summit HDL Score for code coverage, helped achieve high quality RTL implementation.

Early floor planning of I/O and on-chip macros enabled visibility into potential timing problems and thus ensured timely rectification.

Customer speak

“The Chipset design was a first silicon success. Our extensive experience in cutting-edge ASIC and board development, knowledge in networking, large pool of experienced designers, proven design practices and a rich & industry standard tool set allowed the client to beta test the switch well ahead of their competition. The customer’s carrier-class IP switching product has since been announced.”


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