Applying Thought   
About Wipro
Newsroom
Investors
Careers
  
   
Wipro Technologies Consulting IT Services Product Design Business Process Outsourcing CONTACT US
 
Case Studies
Ideas
 
Search
VLSI and System Design Home
ASIC
System-on-Chip
VLSI Turnkey Services
FPGA
Board
RF System Design
Turnkey System Design
Alliances
 
Global Sourcing Lounge
 
 
 
VLSI AND SYSTEM DESIGN
VLSI Turnkey Services
Asic
Having time to market problems due to longer post GDS cycle times than you expected?

Do you want greater flexibility in product pricing by minimizing the margins you have to give away to aggregators?

Wipro is your answer to both these challenges.

Wipro believes that with deep sub micron technologies, time to market is becoming an equally important challenge as finding a manufacturing partner with the right process technology, and the right price point. With its excellence in core design knowledge, Wipro has developed a flow to improve the productivity of post GDS activities thereby reducing time to market for our customers. We have put together partnerships with manufacturing vendors that we believe will bring greater pricing flexibility to our customer.

Our mission is to provide time to market advantage to our customers and lower costs by the superior efficiencies of our post GDS flow.

If you already have an existing manufacturing vendor or captive manufacturing facilities, we can help solve your time to market needs by being responsible for parts of or entire post GDS engineering activities, while you continue to control the manufacturing and commercial issues. This way you can get the advantages of our proven post GDS engineering flow.

If you would require us to help getting packaged and tested finished parts as well, Wipro will bring its manufacturing partners to the table who will take responsibility for manufacturing. You can negotiate the best production pricing directly from them based on your volumes.

Wipro's VLSI Turnkey offerings are as follows:

VLSI design
Architecture & Specification
Front End design
Physical Design
Package design

Test and product engineering
Development of test methodology and test plan
DFT insertion, vector generation
test hardware design and procurement
test development and debug
Fault grading and improvement of test coverage
test time reduction, and test flow optimization
yield analysis
split lot analysis
Tester program conversion to low cost testers and bring up at production site

Manufacturing support
Tie up with assembly and fab for design hand-off in a manner transparent to customer
Delivery of packaged and functionally tested prototypes
Shipment of finished goods
 
  Send us an email
Request proposal for services
Subscribe to our monthly newsletter
  CASE STUDIES
Silicon validation and yield improvement
  More case studies
  BROUCHURES
Eaglewision IC design flow
Wipro ASIC brochure

 
Contact us Terms of use Privacy Sitemap