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MPEG Codec IPs
 

Wipro’s readily available video components support the customer in their programs for developing systems/sub-systems based on standards like MPEG, ITU, ISO/IEC etc. Wipro provides C reference code in floating-point as well as fixed-point for various video standards. The components are tested as per the compliance standards. Wipro also has post-processing algorithms like de-blocking filters. The codecs are re-entrant and re-locatable so that they can be easily integrated into any computing platform with cross-compiling tools.

MPEG-2 Video Decoder

MPEG-2 (ISO/IEC-13818-2) video decoder, Main Profile@Main Level in C++

Built as a component object filter under the DirectShow architecture for easy pluggablity

MMX optimized. Real time for MPEG1(320x280), 18 frames on 300 MHx PII CPU for MPEG-2 for 720x480 resolution


MPEG-4 Video Encoder
All features of MPEG-4 video at simple profile are supported in the implementation. The salient features of Wipro’s MPEG-4 video encoder include:

Completely original code. No re-use from ISO reference code. No IP issues.

Fully configurable using an input configuration file
Capable of generating bitstreams which are compliant with the ITU-T H.263 baseline Recommendation [5]
Maximum number of objects supported: 4
Shape of objects : Rectangular
Video object layer: Base layer decoding only (no scalability)
Maximum width : 352 pixels (can be modified to handle larger widths at simple profile)
Maximum height : 288 pixels (can be modified to handle larger heights at simple profile)
Typical object size : QCIF and CIF
Picture Types: I-VOPs and P-VOPs
AC / DC prediction
1 / 4 Motion Vectors per macroblock
Half-pel and full-pel motion estimation
Search range of 8 / 16/ 32 pixels
Method 2 quantization
Supports bitrate control, at VOP level as well at macroblock level
Constant quality compression by disabling the rate control option
Error resilience features with video packet resynchronization, data partitioning and reversible variable length codes
Bits per pixel = 8
IDCT implementation compliant with the IEEE 1180 standard
Integer version with FAST DCT algorithm
Floating-point version with floating-point implementation of DCT
Real-time encoding on Pentium for 25 frames/second of CIF size
Estimated data memory < 40 kbytes (excluding image buffers) on 16-bit DSP for QCIF sized objects
Estimated performance: 75MIPS on 16-bit single-MAC general purpose DSP for encoding QCIF @ 15 frames/second

MPEG-4 Video Decoder
Completely original code. No re-use from ISO reference code. No IP issues
Maximum number of objects supported: 4
Shape of objects : Rectangular
Video object layer: Base layer decoding only (no scalability)
Maximum width : 352 pixels (can be modified to handle larger widths at simple profile)
Maximum height : 288 pixels (can be modified to handle larger heights at simple profile)
Typical object size : QCIF and CIF
Picture Types: I-VOPs and P-VOPs
AC and DC prediction
Unrestricted motion vectors decoding
4 Motion Vectors per macroblock
Method 2 quantization
Error resilience features with data partitioning and reversible variable length codes
Robustness in the presence of errors in the bitstream. The decoder will NOT terminate but it will continue to decode from the next resync marker or start code position. The lost frames or macroblocks are concealed by substituting visual information from the previous correctly decoded frames or macroblocks
Forward compatibility with the ITU-T H.263 recommendation [5] (meaning that the MPEG-4 decoder will be able to decode bitstreams of the H.263 coding standard at basic level)
Bits per pixel = 8
Compliant with ISO/IEC 14496-4. Compliance testing and verification done using both MoMuSys reference decoder and Microsoft MPEG-4 Video Decoder
IDCT implementation compliant with the IEEE 1180 standard
Integer Version with FAST IDCT algorithm
Floating-point version with floating-point implementation of IDCT
Real-time decoding (including rendering) on Pentium for 30 frames/second of CIF size
Data memory < 40 kbytes (excluding image buffers) on 16-bit DSP for QCIF sized objects
Performance: 40MIPS on 16-bit single MAC DSP for decoding QCIF @ 15 frames/second

H.264 Video Decoder
Fully compliant with upcoming ITU-T H.264/ ISO/IEC 14496 Part 10 standard requirements
Baseline profile @ all Levels
ANSI C compliance reference C code implementation
Fully re-entrant to suit multi channel operation
Error concealment as an optional component
Can be ported to any DSP platform
4:2:0 output format
Interfaces: Wipro’s H.264 decoder has ready to use APIs in two variants, namely the streaming format and the file format. The H.264 video decoder is integrated with SDL display architecture. This demonstrates the decoder capabilities in the form of a visual display

MPEG-4 FGS Decoder
Wipro has developed a reference C code implementation of MPEG-4 FGS decoder which it offers as an Intellectual Property (IP) block. Wipro can customize and optimize the decoder to work on any target DSP platform. In addition, Wipro can provide support for integrating the decoder with end-user system. Wipro’s MPEG-4 FGS decoder complies with ISO/IEC 14496-2 standard and offers the features specified below:
 
AS Profile (Base layer)

B-VOP support
Global motion compensation
Quarter-pel motion compensation
Method 1-2 quantization
FGS Profile (Enhancement layer)

Selective enhancement
Terminated bit-stream handling
Frequency weighting
   
In essence, Wipro’s MPEG-4 FGS decoder supports the levels L0 – L3 as specified by ISO/IEC 14496-2 Amendment 2. The interlacing feature can be added to the decoder based on the need.
 
Audio and Speech | Communication | H.264
 
 
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  CASE STUDIES
Developing an optimized MPEG-1/2 video decoder for the Pentium MMX
  More case studies
  IDEAS
MPEG-4 AVC/H.264 video coding
Digital watermarking: A technology overview
Implementation approaches to Huffman decoding
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