|
This was a challenging project. There were stringent
specifications on MIPS and Memory usage. Peak
MIPS of 35, 8.9K of program memory and 1.1K+3K*N
data memory, were the specifications given by
the customer.
The project involved development of the encoder
and decoder functions based on ITU G.728 Annex G
standard and APIs to setup, configure and run the
encoder and decoder in C. All the Encoder and Decoder
functions were developed in Assembly language to
get the best performance figure. The development
platform was Code Composer for TMS320C54X with C54X
evaluation module (EVM). Some features of the implementation
are:
 |
Peak MIPS
30.65, 6.8K of program memory and 1.1K + 2.4K*N
data memory |
|
Re-entrant, object-based
structure for single and multi-channel system
integration with C callable APIs |
|
Low bit rate versions
with 12.8Kbps and 9.6kbps with reduced Peak
MIPS are part of the product |
|
Far mode supported for
C548 processor |
|
Memory allocate, deallocate
and initialize are done by APIs |
|
Reduced bit rate configurable
during channel set up |
|
Fully interruptible implementation |
|
Runtime selectable post
filter |
|
Bit exact implementation
of ITU G.728 Annex G |
|
