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Wipro's solution was the design and implementation
of three Network processing ASIC designs with
combined gate count complexity of more than 1.8
million gates (excluding on-chip RAMs). This was
done by a team of 35 engineers in a short span
of 10 months.
The design cycle extended from design/coding
stage to synthesis. Wipro's team of board engineers
delivered the design of a variety of physical
interface cards for the IP switch product, as
well as "functionality testing through board
level simulation" and "ensuring timing
through signal integrity checks". Successful
boot-up was achieved within a few hours of powering
up on all boards.
Key highlights of the project included:
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Extensive use of tools for high quality
RTL implementation
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Early floor planning of I/O and on-chip
macros
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System level simulation
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Subsequently, Wipro's software team developed
the firmware, network management and protocol
software for the switch.
The Chipset design was a first silicon success.
Our extensive experience in cutting-edge ASIC
and board development, knowledge in networking,
large pool of experienced designers, proven design
practices and a rich & industry standard tool
set allowed the client to beta test the switch
well ahead of their competition.
Read more about our Data
networking expertise.
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